1. Field of the Invention
The present invention relates to a transmitting circuit and a method for transmitting serial data to a receiving circuit, a receiving circuit and a method for receiving serial data sent from a transmitting circuit, and a data communication apparatus comprising said transmitting circuit and receiving circuit.
2. Description of the Related Art
Transmission of serial data has been reported in numerous literatures. Some of them are introduced below.
Japanese Unexamined Patent Publication (Kokai) No. 11-178349 disclosed an invention of a pulse width modulation control apparatus for transmitting serial data.
Japanese Unexamined Patent Publication (Kokai) No. 11-145944 disclosed a signal synchronization detection circuit for transmitting serial data.
Japanese Unexamined Patent Publication (Kokai) No. 11-74893 disclosed a data communication apparatus and a communication method thereof for transmitting serial data.
Japanese Unexamined Patent Publication (Kokai) No. 5-268210 and No. 6-21999 disclosed inventions of serial data communication apparatuses.
In the related art, frame synchronization during transmission of serial data was carried out by methods shown in the following (1) to (3).
(1) A signal line exclusively for frame synchronization is provided to transmit a frame synchronization signal.
(2) Streams of data are superposed in one signal line by means of frequency modulation or phase modulation and a frame synchronization signal is simultaneously transmitted.
(3) Data of a specific pattern is used as a frame synchronization signal. At the time of data transmission, the code of data is converted to a pattern other than the above frame synchronization signal. At the side of signal reception, data (or bits) corresponding to one frame is extracted based on the frame synchronization signal, and its data code is reversely converted to restore the original data.
The above method (1) has less signal lines for data transmission as a result of the serial transmission, but it needs more signal lines exclusively for frame synchronization because of the intermittently used frame synchronization signals.
The above method (2) and (3) need complicated circuits for code conversion and reverse conversion as well as modulation and demodulation.
In the above method (3), the end of a frame is not known until the whole serial data (a number of bits) corresponding to one frame synchronization pattern is received and compared with a predetermined pattern, so the time for receiving one frame is long.